先谢谢楚狂人，请教下换层地过孔应该怎么加呢？有没有一个示例的图呢？
如果此时Top和Bottom层走线都是参考interlayer1 GND平面，那么切换到Bottom层的HDMI走线是否受到interlayer2层的干扰呢？
我一直没有弄明白这点。在Top层走线时，Top层和地层紧挨着，那么信号的返回路径就直接在GND层；而如果切换到Bottom层后，Bottom层与GND层之间还有interlayer2层，此时HDMI信号会受到interlayer2层的干扰么？
我上面的图绘制的有些仓促，在Top层和Bottom层的四组HDMI线最外面用GND包起来（斜线位置），通过Via接到interlayer1 GND层，上图我是想问一下，如果在切换到Bottom层后，是否需要在与Bottom层相邻的interlayer2层开辟一块GND的区域（对应Bottom层的HDMI走线位置）？
恳请大家指点呀！
回复 68# Pudding_Bear
我觉得你这张图的设计方法不错；按照前面我说的，换层时参考平面不变最好，从一个地层换到另一个地层次之，从地换到电源层最差；
你这张图第三层在地层布线下方电源平面分割出地，此时地层HDMI布线参考地平面，此地平面与第二层地通过过孔连接，那么信号回流通过过孔；如果按你的方案二，需要加电容，不但增加成本，电容大小也不好控制，因此对信号影响比较大。
另外你还要注意你图上信号换层的过孔挨的太近了，地平面有开口，最好过孔距离稍稍加大；
第三层平面有分割，此时需要注意地层敏感信号线、强干扰信号线跨分割。
我一直没有弄明白这点。在Top层走线时，Top层和地层紧挨着，那么信号的返回路径就直接在GND层；而如果切换到Bottom层后，Bottom层与GND层之间还有interlayer2层，此时HDMI信号会受到interlayer2层的干扰么？
——一般来说，电源平面与地平面的板间电容基本将电源平面的高频噪声去耦了，倒是你信号回流在电源平面，会给电源平面带来噪声，表现为毛刺等，信号基本不会受interlayer2干扰，除非电源平面分割的比较厉害，阻抗很大。
回复 72# 桃花岛主
谢谢桃花岛主的赐教，下次布局布线时我会多考虑这方面的问题！
多谢大家的帮忙。
我也做HDMI共模电感，代理台湾KINGCORE。需要的可以找我。kai.zhong@compon-tech.com.贴个我的HDMI共模电感300KHZ至10G的插入损耗图。
一口气看了8页，这个案例说明了EMC做好之前，大家不能忽略的就是SI问题。虽然是欢喜冤家，但还是有点唇亡齿寒的味道。楼主整改的这个播放器，是小公司设计的么，不然不会对传输线阻抗匹配出现这么大的问题，如果是大公司就有点不可原谅了。同时，做好EMC设计，首先要保证SI问题，SI做不好会出EMC问题，SI做太好了也会出EMC问题。
附带一点以前看过的资料，不翻译了自己看看，还可以练习英文，呵呵。
1. Reduce intra-pair skew in a differential trace by introducing small meandering corrections at the point of mismatch.
2. Reduce inter-pair skew, caused by component placement and IC pinouts, by making larger meandering correction along the signal path. Use chamfered corners with a length-to-trace width ratio of 3 to 5. The distance between bends should be at least 8 to 10 times the trace width.
3. Use 45o bends (chamfered corners), instead of right-angle (90o) bends. Right-angle bends increase the effective trace width, which changes the differential trace impedance creating a small discontinuity. A 45o bends is seen as an even smaller discontinuity.
Figure 7. Skew reduction via meandering using chamfered corners
4. When routing around an object, route both trace of a pair in parallel. Splitting the traces changes the line-to-line spacing, thus causing the differential impedance to change and discontinuities to occur.
Figure 8. Routing around an object
5. Place passive components within the signal path, such as source-matching resistors or ac-coupling capacitors, next to each other. Routing as in case a) does create wider trace spacing than in b); however, the resulting discontinuity is limited to a far narrower electrical length.
Figure 9. Lumping discontinuities
6. When routing traces next to a via or between an array of vias, make sure that the via clearance section does not interrupt the path of the return current on the ground plane below.
Figure 10. Avoiding via clearance sections
7. Avoid metal layers and traces underneath or between the pads of the HDMI connectors for better impedance matching. Otherwise they may cause the differential impedance to drop below 75 and fail your board during TDR testing.
Figure 11. Keeping planes out of the area between edge-fingers
8. Use the smallest size possible for signal trace vias and HDMI connector pads as they have less impact on the 100 differential impedance. Large vias and pads can cause the impedance to drop below 85 .
9. Use solid power and ground planes for 100 impedance control and minimum power noise.
10. For 100 differential impedance use the smallest trace spacing possible, which usually is specified by your PCB vendor. Make sure that the geometries in Figure 5 are: s < h, s < W, W < 2h, and d > 2s. Even better, use a 2D field solver to determine the trace geometries more accurately.
11. Keep the trace electrical length between the HDMI connector and the device as short as possible to minimize attenuation.
12. Use good HDMI connectors whose impedances meet the specifications.
13. Place bulk capacitors, (i.e., 10 ¼F), close to power sources, such as voltage regulators or where the power is supplied to the PCB.
14. Place smaller 0.1 ¼F or 0.01 ¼F capacitors at the device.
15. Reference Planes
The power and ground planes of a high-speed PCB design usually must satisfy a variety of requirements. At DC and low frequencies they must deliver stable reference voltages, such as Vcc and ground, to the supply terminals of integrated circuits and termination resistors.
16. At high frequencies reference planes, and in particular ground planes, serve numerous purposes. For the design of controlled impedance transmission systems, the ground plane should provide strong electric coupling with the differential traces of an adjacent signal layer. As mentioned earlier, close coupling causes the magnetic fields to cancel, thus minimizing EMI through reduced TEM wave radiation of the remaining fringing fields. To accomplish close coupling, place the ground plane next to a high-speed signal layer.
好帖。受教！
正好遇到HDMI445MHz的问题。。太棒了！
回复 13# 楚狂人
很详细的
